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as1916 - as1918 microprocessor supervisory circuits with manual reset and watchdog data sheet www.austriamicrosystems.com revision 1.00 1 - 13 1 general description the as1916 - as1918 microprocessor supervisory cir- cuits were designed to generate a reset when the moni- tored supply voltage falls below a factory-trimmed threshold. the reset rema ins asserted for a minimum timeout period after the supply voltage stabilizes. guaranteed to be in the correct state for v cc higher than +1.0v, these devices are ideal for portable and battery- powered systems with strict monitoring requirements. the devices feature factory-tr immed thresholds to moni- tor a supply voltage between 1.8 and 3.6v. the devices are available wit h the reset output types listed in ta b l e 1 . the as1916 - as1918 include a manual-reset input for systems that never fully pow er down the microproces- sor. additionally, these devices feature a watchdog timer to help ensure that the processor is operating within proper code boundaries. the as1916 - as1918 are available in a 5-pin sot23 package. figure 1. typical application diagram 2 key features v cc supervisory range: +1.8 to +3.6v guaranteed reset valid down to v cc = +1.0v reset timeout delay: 215ms manual reset input three reset output types - active-low push/pull (as1916) - active-high push/pull (as1917) - active-low open-drain (as1918) watchdog timeout period: 1.5s immune to fast negative v cc transients external components not required operating temperature range: -40 to +125c 5-pin sot23 package 3 applications the devices are ideal for portable and battery-powered systems, embedded controllers, intelligent instruments, automotive systems, and critical cpu monitoring appli- cations. table 1. standard products model reset output type as1916 active-low push/pull as1917 active-high push/pull as1918 active-low open-drain as1916/ as1918 external reset cpu i/o supply v cc gnd resetn i/o 4 wdi 5 v cc 3 mrn gnd 2 1 resetn
www.austriamicrosystems.com revision 1.00 2 - 13 as1916 - as1918 data sheet - pinout 4 pinout pin assignments figure 2. pin assignments (top view) pin descriptions table 2. pin descriptions pin number pin name description 1 resetn active-low reset output (as1916, as1918). the resetn signal togg les from high to low when v cc , or mrn is pulled low, or the watchdog tr iggers a reset. this output signal remains low for the reset timeout period after all supervised voltages exceed their reset threshold, or mrn goes low to high, or the watchdog triggers a reset. reset active-high reset output (as1917). the reset signal t oggles from low to high when v cc , or mrn is pulled low, or the watchdog trigger s a reset. this output signal remains high for the reset timeout period (see t rp on page 4 ) after all supervised voltages exceed their reset threshold, or mrn goes low to high, or the watchdog triggers a reset. 2gnd ground 3mrn active-low manu al reset input . pulling this pin low asserts a reset. this pin is connected to the internal 50k pullup to v cc . this reset remains active as long as mrn is low and for the reset timeout period (see t rp on page 4 ) after mrn goes high. note: if the manual reset feature is not used, th is pin should be unconnected or connected to v cc . 4wdi watchdog input . if wdi remains high or low for longer than the watchdog timeout period (see t wd on page 5 ), the internal watchdog timer period expires and a reset is triggered for the reset timeout period (see t rp on page 4 ). the internal watchdog timer clears whenever a reset is a asserted or when wdi senses a rising or falling edge. note: to disable the watchdog feature, this pin must be unconnected or connected to a tri- state buffer output. 5v cc supervised voltage input . this pin serves as the supervised supply voltage input. as1916 - as1918 2 gnd 3 mrn 1 resetn/reset 4 wdi 5 v cc
www.austriamicrosystems.com revision 1.00 3 - 13 as1916 - as1918 data sheet - absolute maximum ratings 5 absolute maximum ratings stresses beyond those listed in table 3 may cause permanent damage to the device. these are stress ratings only, and functional operation of the de vice at these or any other cond itions beyond those indicated in electrical character- istics on page 4 is not implied. exposure to absolute maximum ra ting conditions for extended periods may affect device reliability. table 3. absolute maximum ratings parameter min max units comments v cc to gnd -0.3 +5.0 v open-drain resetn -0.3 +7.0 v push/pull reset, resetn -0.3 v cc + 0.3 v mrn, wdi to gnd -0.3 v cc + 0.3 v input current (v cc )20ma output current (reset, resetn) 20 ma continuous power dissipation (t amb = +70oc) 696 mw derate 8.7mw/oc above +70oc operating temperature range -40 +125 oc junction temperature +150 oc storage temperature range -65 +150 oc package body temperature +260 oc the reflow peak soldering temperature (body temperature) specified is in accordance with ipc/jedec j-std-020c ?moisture/reflow sensitivity classification for non-hermetic solid state surface mount devices?. the lead finish for pb-free leaded packages is matte tin (100% sn).
www.austriamicrosystems.com revision 1.00 4 - 13 as1916 - as1918 data sheet - electrical characteristics 6 electrical characteristics v cc = +2.7 to +3.6v for as19xx-t/s/r , v cc = +2.1 to +2.75v for as19xx- z/y, v cc = +1.53 to +2.0v for as19xx-w/v; t amb = -40 to +125oc (unless otherwi se specified). typ values @ t amb = +25c. table 4. electrical characteristics symbol parameter 1 conditions min typ max units v cc operating voltage range t amb = 0 to +85oc 1.0 3.6 v t amb = -40 to +125oc 1.2 3.6 i cc v cc supply current (mrn and wdi not connected) v cc = +3.6v, no load, t amb = -40oc to +85oc 5.5 12 a v cc = +3.6v, no load, t amb = -40 to +125oc 19 v th v cc reset threshold (v cc falling) t amb = -40 to +85oc as19xx-t 2.994 3.08 3.154 v t amb = -40 to +125oc 2.972 3.179 t amb = -40 to +85oc as19xx-s 2.848 2.93 3.000 t amb = -40 to +125oc 2.827 3.024 t amb = -40 to +85oc as19xx-r 2.556 2.63 2.693 t amb = -40 to +125oc 2.538 2.714 t amb = -40 to +85oc as19xx-z 2.255 2.32 2.376 t amb = -40 to +125oc 2.239 2.394 t amb = -40 to +85oc as19xx-y 2.129 2.19 2.243 t amb = -40 to +125oc 2.113 2.260 t amb = -40 to +85oc as19xx-w 1.623 1.67 1.710 t amb = -40 to +125oc 1.612 1.723 t amb = -40 to +85oc as19xx-v 1.536 1.58 1.618 t amb = -40 to +125oc 1.525 1.631 reset threshold temperature coefficient 60 ppm/ oc reset threshold hysteresis 8 x v th mv t rd v cc to reset output delay v cc = v th to (v th - 100mv) 55 s t rp reset timeout period t amb = -40 to +85oc 140 215 280 ms t amb = -40 to +125oc 100 320 v ol resetn output low (push/pull or open-drain) v cc 1.0v, i sink = 50a, reset asserted, t amb = 0 to +85oc 0.3 v v cc 1.2v, i sink = 100a, reset asserted 0.3 v cc 2.55v, i sink = 1.2ma, reset asserted 0.3 v cc 3.3v, i sink = 3.2ma, reset asserted 0.4 v oh resetn output high (push/pull only) v cc 1.8v, i source = 200a, reset not asserted 0.8 x v cc v v cc 3.15v, i source = 500a, reset not asserted 0.8 x v cc v cc 3.3v, i source = 800a, reset not asserted 0.8 x v cc i lkg open-drain r esetn output leakage current resetn not asserted 1.0 a t amb = +25oc 0.2
www.austriamicrosystems.com revision 1.00 5 - 13 as1916 - as1918 data sheet - electrical characteristics v oh reset output high (push/pull only) v cc 1.0v, i source = 1a, reset asserted, t amb = 0 to +85oc 0.8 x v cc v v cc 1.50v, i source = 100a, reset asserted 0.8 x v cc v cc 2.55v, i source = 500a, reset asserted 0.8 x v cc v cc 3.3v, i source = 800a, reset asserted 0.8 x v cc v ol reset output low (push/pull only) v cc 1.8v, i sink = 500a, reset asserted 0.3 v v cc 3.15v, i sink = 1.2ma, reset asserted 0.3 v cc 3.3v, i sink = 3.2ma, reset asserted 0.4 manual reset input v il mrn input voltage 0.3 x v cc v v ih 0.7 x v cc mrn minimum input pulse 1 s mrn transient rejection 90 ns mrn to reset delay 130 ns mrn pullup resistance 25 50 75 k watchdog input t wd watchdog timeout period t amb = -40 to +85oc 1.12 1.5 2.4 s t amb = -40 to +125oc 0.80 2.60 t wdi wdi pulse width 2 20 ns v il wdi input voltage 0.3 x v cc v v ih 0.7 x v cc i wdi wdi input current wdi = v cc , time average 80 160 a wdi = 0, time average -20 -11 1. over-temperature limits are guaranteed by design and not production tested. devices tested at +25oc. 2. guaranteed by design and not production tested. table 4. electrical characteristics (continued) symbol parameter 1 conditions min typ max units
www.austriamicrosystems.com revision 1.00 6 - 13 as1916 - as1918 data sheet - typical operating characteristics 7 typical operating characteristics t amb = +25oc (unless otherwise specified). figure 3. normalized reset threshold delay vs. figure 4. v out vs. v cc , v th = 1.58v, temperature active-low (typ) figure 5. reset timeout period vs. temperat ure figure 6. supply current vs. temperature figure 7. v oh vs. i source ; v cc = 3.2v figure 8. v ol vs. i sink ; v cc = 3.2v -0.50 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00 5.50 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 v cc (v) output voltage (v) e 0.94 0.96 0.98 1 1.02 1.04 1.06 -40 -20 0 20 40 60 80 100 120 temperature (c) reset threshold (v) e 3 4 5 6 7 8 9 10 -50 -25 0 25 50 75 100 125 temperature (c) v cc supply current (a) e v cc = 3.08v t version v cc = 1.58v v version 150 160 170 180 190 200 210 220 230 240 250 -40 -20 0 20 40 60 80 100 120 temperature (c) reset timeout periode (ms) 2.9 2.95 3 3.05 3.1 3.15 3.2 3.25 0 0.2 0.4 0.6 0.8 1 1.2 i source (ma) v out (v) ] 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 01234567 i sink (ma) v out (v) e
www.austriamicrosystems.com revision 1.00 7 - 13 as1916 - as1918 data sheet - detailed description 8 detailed description the as1916 - as1918 supervisory circuits were designed to generate a reset when the monitored supply voltage falls below its factory-trimmed trip threshold (see v th on page 4 ), and to maintain the reset for a minimum timeout period (see t rp on page 4 ) after the supply has stabilized. the integrated watchdog timer (see watchdog input on page 8) helps mitigate against bad programming code or clock signals, and/or poor peripheral response. the active-low manual reset input (see manual reset input on page 8) allows for an externa lly activated system reset. reset/resetn whenever the monitored supply voltage falls below its reset threshold, the reset output asserts low or the resetn output asserts high. once the monitored voltage has stabilized, an internal timer keeps the reset asserted for the reset timeout period (t rp ). after the t rp period, the reset/reset n output returns to its original state (see figure 10) . figure 9. functional diagram of v cc supervisory application figure 10. reset timing diagram as1916 - as1918 reset timeout delay generator watchdog transition detector watchdog timer + ? v cc 1.26v 2 gnd 5 v cc 4 wdi 1 resetn/ reset 3 mrn 1v t rd t rp t rp t rd v th v th v cc resetn reset gnd 1v
www.austriamicrosystems.com revision 1.00 8 - 13 as1916 - as1918 data sheet - detailed description watchdog input the integrated watchdog feature can be used to monitor proce ssor activity via pin wdi, and can detect pulses as short as 50ns. the watchdog requires that the processor toggle the watchdog logic input at regular intervals, within a speci- fied minimum timeout period (1.5s, typ). a reset is asserted for the reset timeout period. as long as reset is asserted, the timer remains cleared and is not incremented. when reset is deasserted, the watchdog timer starts counting ( figure 11 ). note: the watchdog timer can be cleared with a reset pulse or by toggling wdi. figure 11. watchdog timing relationship the watchdog is internally driven low during most (87.5%) of the watchdog timeout period (see t wd on page 5 ) and high for the rest of the watchdog timeout period. when pin wdi is left unconnected, this internal driver clears the watchdog timer every 1.4s. when wdi is tri-stated or is not connected, the maximum allowable leakage current is 10a and the maximum allowable load capacitance is 200pf. note: the watchdog function can be disabled by leaving pin wd i unconnected or connecting it to a tri-state output buffer. manual reset input the active-low pin mrn is used to force a manual reset. th is input can be driven by cmos logic levels or with open- drain collector outputs. pulling mrn low asserts a reset which will remain asserted as long as mrn is kept low, and for the timeout period (see t rp on page 4 ) after mrn goes high (140ms min). the manual reset circuitry has an internal 50k pullup resistor, thus it can be left open if not used. to create a manual-reset circuit, connect a normally open momentary switch from pin mrn to gnd (see figure 1 on page 1) ; external debounce circuitry is not required in this configuration. if mrn is driven via long cables or the device is used in a noisy environment, a 0.1f capacitor between pin mrn and gnd will provide additional noise immunity. t rst the reset signal is the inverse of the resetn signal. t wd v cc resetn wdi t rp t rp
www.austriamicrosystems.com revision 1.00 9 - 13 as1916 - as1918 data sheet - application information 9 application information watchdog input current the watchdog input is driven through an internal buffer an d an internal series resistor from the watchdog timer (see figure 11 on page 8) . when pin wdi is left unconnected (watchdog disabled), the watchdog timer is serviced within the watchdog timeout period (see t wd on page 5 ) by a low-high-low pulse from the counter chain. for minimum watchdog input current (minimum overall po wer consumption), pull wdi low for most of the watchdog timeout period, pulsing it low-high-low once within the fi rst 7/8 (87.5%) of the watchdog timeout period to reset the watchdog timer. note: if wdi is externally driven high for the majority of the timeout period, up to 160a can flow into pin wdi. interfacing to bi-direct ional cpu reset pins since the reset output of the as1918 is open drain, this device interfaces easily with processors that have bi-direc- tional reset pins. connecting the processor reset output di rectly to the as1918 resetn pin with a single pullup resis- tor (see figure 12) allows the as1918 to assert a reset. figure 12. as1918 resetn-to-cpu bi-directional reset pin fast negative-going transients fast, negative-going v cc transients normally do not require the cpu to be shutdown. the as1916 - as1918 are virtu- ally immune to such transients. resets are issued to the cpu during power-up, powerdown, and brownout conditions. note: v cc transients that go 100mv below the reset threshold and last 55s typically will not assert a reset pulse. valid reset to v cc = 0 the as1916 - as1918 are guaranteed to operate properly down to v cc = 1v. for as1916 and as1917 applications requiring valid reset levels down to v cc = 0, a pulldown resistor to active-low outputs and a pullup resistor to active-high outputs will ensure that the reset line is valid during the interval where the reset output can no longer sink or source current. watchdog tips careful consideration should be taken when implementing the as1916 - as1918 watchdog feature. one method of supervising software code execution is to set/ reset the watchdog input at different places in the code, rather than pulsing the watchdog input high-low-high or low-hi gh-low. this method avoids a loop condition in which the watchdog timer would continue to be reset inside the loop, preventing the watchdog from ever timing out. as1918 cpu reset generator v cc resetn gnd v cc v cc 1 resetn gnd 2 v cc 5
www.austriamicrosystems.co m revision 1.00 10 - 13 as1916 - as1918 data sheet - application information figure 13 shows a flowchart where the input/output driving the watchdog is set high at the beginning of the routine, set low at the beginning of every subroutine, then set high again when the routine returns to the beginning. if the routine should hang in a subroutine, the problem would quickly be corrected, since the i/o is continually set low and the watch- dog timer is allowed to time out, causing a reset or interrupt to be issued (see watchdog input current on page 9) . this method results in higher averaged wdi input current over time than a case where wdi is held low for the majority (87.5%) of the timeout period and periodically pulsing it low-high-low. figure 13. example watchdog programming flowchart start set wdi high subroutine or program loop set wdi low return program code
www.austriamicrosystems.co m revision 1.00 11 - 13 as1916 - as1918 data sheet - pack age drawings and markings 10 package drawings and markings the devices are available in an 5-pin sot23 package. figure 14. 5-pin sot23 package symbol min max a0.901.45 a1 0.00 0.15 a2 0.90 1.30 b0.300.50 c0.090.20 d2.803.05 e2.603.00 e1 1.50 1.75 l0.300.55 e 0.95 ref e1 1.90 ref 0o 8o notes: 1. all dimensions in millimeters. 2. foot length measured at intercept point between datum a and lead surface. 3. package outline exclusive of mold flash and metal burr. 4. package outline inclusive of solder plating. 5. complies with eiaj sc74. 6. pkg st 0003 rev a supersedes sot23-d-2005 rev c.
www.austriamicrosystems.co m revision 1.00 12 - 13 as1916 - as1918 data sheet - ordering information 11 ordering information the devices are available as the standard products shown in table 5 . table 5. ordering information model marking description threshold delivery form package as1916s-t asio active-low push/pull supervisory circuit with watchdog and manual reset 2.93v tape and reel 5-pin sot23 as1916r-t asip active-low push/pull supervisory circuit with watchdog and manual reset 2.63v tape and reel 5-pin sot23 as1916z-t asiq active-low push/pull supervisory circuit with watchdog and manual reset 2.32v tape and reel 5-pin sot23 as1916v-t asir active-low push/pull supervisory circuit with watchdog and manual reset 1.58v tape and reel 5-pin sot23 as1917s-t asis active high push/pull supervisory circuit with watchdog and manual reset 2.93v tape and reel 5-pin sot23 as1917r-t asit active high push/pull supervisory circuit with watchdog and manual reset 2.63v tape and reel 5-pin sot23 as1917z-t asiu active high push/pull supervisory circuit with watchdog and manual reset 2.32v tape and reel 5-pin sot23 AS1917V-T asiv active high push/pull supervisory circuit with watchdog and manual reset 1.58v tape and reel 5-pin sot23 as1918s-t asiw active-low open drain supervisory circuit with watchdog and manual reset 2.93v tape and reel 5-pin sot23 as1918r-t asix active-low open drain supervisory circuit with watchdog and manual reset 2.63v tape and reel 5-pin sot23 as1918z-t asiy active-low open drain supervisory circuit with watchdog and manual reset 2.32v tape and reel 5-pin sot23 as1918v-t asiz active-low open drain supervisory circuit with watchdog and manual reset 1.58v tape and reel 5-pin sot23
www.austriamicrosystems.co m revision 1.00 13 - 13 as1916 - as1918 data sheet copyrights copyright ? 1997-200 7, austriamicrosystems ag, schloss premstaett en, 8141 unterpremstae tten, austria-europe. trademarks registered ?. all rights reserved. the materi al herein may not be reproduced, adapted, merged, trans- lated, stored, or used without the prior written consent of the copyright owner. all products and companies mentioned are trademarks or registered trademarks of their respective companies. disclaimer devices sold by austriamicrosystems ag are covered by t he warranty and patent indemni fication provisions appearing in its term of sale. austriamicrosystems ag makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriami- crosystems ag reserves the right to chang e specifications and prices at any time and without notice. therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems ag for current information. this product is intended for use in normal commercial a pplications. applications r equiring extended temperature range, unusual environmental requirements, or high reliability app lications, such as military, medical life-support or life- sustaining equipment are specifically not recommended withou t additional processing by austriamicrosystems ag for each application. for shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. the information furnished here by austriamicrosystems ag is believed to be correct and accurate. however, austriamicrosystems ag shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or ar ising out of the furnishing, performance or use of the tech- nical data herein. no obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems ag rendering of technical or other services. contact information headquarters austriamicrosystems ag a-8141 schloss premstaetten, austria tel: +43 (0) 3136 500 0 fax: +43 (0) 3136 525 01 for sales offices, distributors and representatives, please visit: http://www.austriamicrosystems.com/contact

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